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HomeDefenceParas Defence bets on advanced chip packaging with new semiconductor arm

Paras Defence bets on advanced chip packaging with new semiconductor arm

The group is also building an OSAT facility. This is in view of a larger plan to create a hub for chiplet integration and advanced system-in-package technologies.

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New Delhi: Paras Defence & Space Technologies Ltd (PDST) announced the launch of Paras Semiconductor Pvt Ltd as a subsidiary on 18 January. This expands the group’s business into India’s semiconductor industry.

It is part of PDST’s larger plan to create a hub for chiplet integration and advanced system-in-package (SiP) technologies.

The group is also establishing an Outsourced Semiconductor Assembly and Test (OSAT) facility. The advanced, heterogeneous, 3D packaging facility will focus on semiconductor devices for all optical and opto-electronic systems. It will facilitate the assembly, packaging, and testing of chips post-fabrication.

The group will outsource the chip design.

Its target is to specialise in advanced semiconductor packaging and assembly, bridging the gap between chip fabrication and the final system, while moving beyond bulky traditional chips to create customised, powerful, and energy-efficient designs, according to a Paras statement.

India excels in chip design and fabrication policy, but lacks a strong, domestic, advanced packaging base, especially for defence needs.

“Paras Semiconductor aims to address this gap by building domestic capability in packaging, testing, and qualification for strategic electronics,” the group statement added.

Why semiconductor matters

Due to technological advancements, the semiconductor industry is undergoing a structural change. It now aims to package multiple chips together into a single system, thereby delivering higher performance with lower power consumption. The process will improve the reliability of complex defence and computing applications.

Across the world, the semiconductor industry is transitioning from transistor scaling to system-level integration. This is done through chiplets, hybrid bonding, 2.5D/3D heterogeneous integration (3DHI), wafer- and panel-level fan-out, fine-pitch copper pillar/micro-bump, co-packaged optics (CPO) integration and high-end test/qualification.

However, India lacks domestic capacity in advanced packaging to complement its renowned strength in semiconductor design.

Due to consistent technological advantage, advanced packaging has become central to applications, such as high-performance computing, secure communications, radar systems, and electronic warfare.

For defence platforms, such capabilities are critical to ensure assured availability, long product lifecycles, and control over sensitive technologies.

Due to the current geopolitical environment, where trade restrictions, export controls, and supply chain disruptions have become recurrent, these technologies have turned critical.

Global governments, including India, are also incentivising local manufacturing with trusted supply chains through policy support and long-term ecosystem development.

(Edited by Madhurita Goswami)


Also Read: The curious case of Pakistan’s JF-17 ‘orders’


 

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